专利名称：Programmable Logic Systems and Methods
Employing Configurable Floating Point Units
发明人：Hare K. Verma,Ravi Sunkavalli,Manoj Gunwani申请号：US12885103申请日：20100917
公开号：US20110010406A1公开日：20110113
专利附图：
摘要：A programmable system is disclosed having multiple configurable floating pointunits (“FPU”) that are coupled to multiple programmable logic and routing blocks andmultiple memories. Each floating point unit has static configuration blocks and dynamic
configuration blocks, where the dynamic configuration blocks can be reconfigured toperform a different floating point unit function. A floating point unit includes a pre-normalization for shifting an exponent calculation as well as shifting and aligning amantissa, and a post-normalization for normalizing and rounding a received input. Thepost-normalization receives an input Z and realigns the input, normalizes the input androunds the input Z.
申请人：Hare K. Verma,Ravi Sunkavalli,Manoj Gunwani
地址：Cupertino CA US,Milpitas CA US,San Jose CA US
国籍：US,US,US
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